ST using Springsoft’s VIA platform for chip verification

Using the VIA platform, STMicroelectronics R&D verification engineers have been able to create a Tool Command Language (TCL) script that eliminates many of the time-consuming, manual steps of locating logic violations, selecting the scope for display in the Verdi debug environment, adding the corresponding signals in the waveform viewer, and then tracing to the right time in the cycle. Simply loading the violation reports into Verdi allows the tool to do the work and saves minutes for each violation and lots of debug time.

“As a leading Verdi user, STMicroelectronics has helped guide our product strategy, reinforcing our commitment to open solutions and facilitating development of interoperable technologies,” said Mark Milligan, vice president of corporate marketing at Springsoft.

SpringSoft’s Verdi software is a highly automated debug system that accelerates the comprehension of complex IP components, design modules and entire system-on-chip (SoC) design behaviour. The VIA platform provides open connections to the Verdi database and software infrastructure, which enables users to quickly create and integrate applications tailored to their requirements. STMicroelectronics engineers have developed VIA programs that automate the process for checking violation reports from logic simulation and analyzing chip reports to identify critical yield, reliability and field failure issues.

Engineers have been using the Verdi schematic, source code and waveform views to provide a complete picture of designs for debug. With the VIA platform, they can also leverage the Verdi software infrastructure to automatically source chip reports and locate potential defects, so they can be visualized in physical layout for detailed failure analysis.


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